A data processing system typically comprises a host computer connected to one or more nodes, e.g., other host computers or peripheral devices, via an interconnect medium. The host computer comprises a number of basic elements including a central processing unit (CPU), a host memory and at least one input/output (I/O) port adapter that physically connects the computer to the interconnect medium. In general, the interconnect medium is a network or I/O bus and the peripheral devices are typically disks, tapes and communications equipment.
The host computer is functionally organized by an operating system comprising a collection of software modules that control the execution of computer programs and manage the transfer of information among the elements of the computer. The host memory stores computer program information, i.e., data and instructions, in addressable storage locations. The CPU then executes the programs by fetching and interpreting the instructions, and processing the data in accordance with the instructions.
Program-generated addresses are called virtual addresses because they refer to the contiguous logical, i.e., virtual, address space referenced by a computer program. In contrast, the physical address space consists of the actual locations where information is stored in host memory. A host computer with a "virtual" memory allows programs to address more memory than is physically available. In addition, an advantage of virtual addressing is that the addresses that the program uses appear contiguous to the program even though they may reference non-contiguous physical locations in host memory. This facilitates dynamic allocation of additional physical addresses, as needed.
The operating system manages the virtual memory so that the program operates as if it is loaded into contiguous physical locations. One common scheme for managing virtual memory is to divide the program and host memory into equal-sized blocks or pages so that each program page fits into a memory page. A system disk participates in the implementation of the "virtual" memory by storing pages of the program not currently in host memory. The loading of pages between the disk and host memory (paging) is managed by the operating system.
When a program references an address in virtual memory, the CPU calculates the corresponding host memory physical address in order to access the information (hereinafter referred to generally as data). The CPU typically includes memory management hardware to hasten the translation of the virtual address to a physical address. Specifically, for each program there is a page table containing a list of mapping entries, i.e., page table entries (PTEs), which, in turn, contain the physical address of each page of the program and a valid bit denoting whether the PTE is valid. Each PTE thus indicates whether the program page is in host memory. If not, the PTE typically specifies where to find a copy of the page on the disk.
The operating system includes at least one port driver that controls at least one I/O port adapter when performing I/O operations, such as the transfer of data between the host computer and a node. In order to efficiently perform these operations, the port driver and port adapter exchange messages, e.g., commands and responses, via linked queues, which are locations in host memory organized to provide data structures. Specifically, the driver sends a command to the adapter to perform an operation. The adapter interprets the command and forwards it to the appropriate node on the medium. The adapter then returns a response to the driver.
An example of an I/O operation command to which the invention is generally directed is a request to transfer data from the computer memory to a disk (and vice versa) via the port adapter. The present invention is particularly directed to increasing the throughput of the data processing system by allowing the disk, in conjunction with the adapter, to access the data in host memory in a manner that optimizes disk performance and minimizes CPU and I/O port adapter overhead. However, the present invention is also directed to bulk data transfer requests between two host computers. The request typically includes information as to the locations in host memory where the requested data is stored. For a virtual memory computer, these locations, called the user data buffer, are typically, but not necessarily, contiguous in the computer's virtual address space, but not necessarily contiguous in its physical address space. That is, portions of the data buffer may be scattered throughout physical host memory. Although virtual addressing of the user data buffer facilitates program generation, such addressing is cumbersome from the point of view of the I/O port adapter.
Specifically, the user data buffer may be identified by a name, i.e., a named data buffer, and its location in virtual memory is identified by a buffer descriptor. An example of a named data buffer is disclosed in U.S. Pat. No. 4,777,595 titled, APPARATUS FOR TRANSFERRING BLOCKS OF INFORMATION FROM ONE NODE TO A SECOND NODE IN A COMPUTER NETWORK, by Strecker et al. A buffer descriptor table resident in host memory contains an array of buffer descriptors, each defining a data buffer. Each buffer descriptor contains a virtual address pointer to an entry in the page table, i.e., a PTE, and each PTE, in turn, contains the location of a page of physical memory. Thus, the port adapter uses the buffer name, the buffer descriptor, and the page table to access a named data buffer in host memory.
When the port adapter forwards a request-to-store-data command to the disk, the command includes the name of the data buffer. Later, the disk returns a derivative of the command to the adapter that requests a portion of the data to be stored. The derivative command also includes the name of the data buffer. Using the name, the adapter accesses the buffer descriptor table, acquires a pointer to the appropriate PTE, and eventually identifies the physical location of the buffer in host memory. The port adapter then retrieves the data directly from the buffer location, sends it to the disk and subsequently notifies the port driver.
To summarize, because the buffer descriptor contains a virtual address pointer to the "virtual memory" data buffer, the adapter must translate the virtual address of the pointer to a physical address prior to locating the buffer in host memory. Accordingly, the adapter must access the page table in host memory. This results in an increase in the time and processing steps, e.g., at least three memory access operations, required to access a buffer location in memory.
Furthermore, these processing steps must typically be performed for each data transfer to host memory. For the example illustrated above, the node may retrieve the requested data in multiple transfers in order to complete the I/O operation or "transaction". The port adapter is thus required to frequently access the buffer descriptor table and the page table in host memory to determine the locations for accessing the data in the buffer, even though it is responding to a single command from the port driver.
Alternatively, the buffer descriptor may contain a pointer to a "scatter-gather" pointer list, which may comprise a list of arbitrary length and arbitrarily aligned address pairs used to find a virtual memory data buffer. A scatter-gather list is particularly useful for data transactions involving disks because it enables the transfer of data, in one I/O transaction, from non-contiguous locations in host memory to contiguous locations on disk, and vice versa. Because the elements of the list may have a non-fixed, arbitrary length, the port adapter must process each element to find the actual location within the buffer, thereby increasing overhead.
Therefore, it is desirable to provide a system for accessing a named data buffer that avoids the foregoing difficulties by allowing efficient transfer of data between a host entity, such as a computer, and an external entity, such as a peripheral disk.
In addition, it is desirable to provide a system that incorporates a memory mapping technique for efficiently translating the name of a named data buffer to the actual location of the data in the host memory.
Furthermore, it is desirable to provide a memory mapping system that is not specific to the host entity architecture, thereby obviating any knowledge of the memory management policies on behalf of the external entity.